1. Field of the Invention
The present invention pertains to computer display drivers. More particularly, the present invention pertains to allocation of resources in a display driver system.
2. The Prior Art
Modem video graphics controllers for use in computers to drive display devices typically include features which permit great versatility of use. Among the features included in such video graphics controllers is the ability to manipulate pixel data from more than one source. In addition to a video memory, some of the various sources from which the pixel data may be obtained include, for example, a video capture unit, a video playback unit, a block transfer unit, and a CPU interface. Each of these sources in the video graphics controller, known as "clients", require access to the video memory to either write data to the video memory or to read data from the video memory.
A prior art scheme for arbitrating access between the various "clients" of the video memory has been employed by Chips & Technologies, Inc. In the prior art arbitration scheme, a video memory controller is equipped with a multi-channel arbitration feature. Each channel is associated with one of the clients of the video memory. Priority among the channels for access to the video memory is determined dynamically by the video memory controller according to the current needs of the requesting channel, and the assigned priorities of each of the channels.
To determine the needs of each of the channels, the video memory controller uses two pieces of information. The first piece is the amount of data that is present in each of the FIFO memory buffers of the clients. Thus information is tracked by the memory controller. The second piece of information comprises the high and low data limits for each of the FIFO memory buffers. This piece of information is stored in a set of configuration registers. For each video memory access cycle, the memory controller checks whether the FIFO buffer of each of the clients is either below the low limit or in between the low and the high limits set for each particular FIFO memory buffer.
Once the priority has been determined by the memory controller by assessing the relative data needs of each of the clients and considering the assigned priorities of each of the clients, the memory controller provides the selected client with a data transfer or memory burst from the video memory. The burst limits for data transfer in each channel are stored in burst limit registers in the memory controller. Bursts are preferably set to be long enough to fill the FIFOs past the lowlimit set point.
In this scheme, each of the memory requesters of the video memory is a client of the memory controller. Since different groups of some of the clients can be related to one another, the most efficient scheme for allocating data access to the video memory may not be to make every data requestor a client of the video controller.
It is therefore an object of the present invention to group related clients that have differing data access needs.
It is a further object of the present invention to implement a two-level arbitration scheme, wherein on the first level of arbitration the memory controller arbitrates the data access between its clients, and on the second level of arbitration, selected clients, independently of the memory controller, arbitrate between a group of similar sub-clients.